Session 4A Influence of thermal annealing on electrical parameters of gate stack with metal gate and bevelled thin oxide P. Benko, M. Ťapajna, K. Fröhlich, J. Jakabovič Analysis of ESD protection devices dependent on structure geometry A. Chvála, D. Donoval, P. Beňo Temperature analysis of the ruggedness of power MOS transistor during UIS test supported by modeling and simulation J. Marek, D. Donoval, A. Vrbicky Electrical properties of Ru/HfO[2]/SiO[2]/Si(n) MOS structure P. Valent, J. Racko, P. Pinteš, D. Donoval, J. Breza, P. Benko, L. Harmatha Charge carrier transport in semi-insulating GaAs MSM structures: role of electrode technology P. Boháček, F. Dubecký, M. Sekáčová Electrical characterization of MOS structures with a Ni metal gate on thin high-κ dielectrics L. Harmatha, P. Benko, I. Novotný, V. Řeháček, J. Jakabovič, M. Ťapajna, P. Písečný Growth and characterization of the GdScO[3] gate dielectricfor CMOS technology R. Luptak, K. Fröhlich, E. Dobročka, K. Hušeková, A. Vincze